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9FGV0631C データシート

9FGV0631C 6-Output Very Low-Power PCIe Gen 1-2-3-4 Clock Generator IDT
Integrated Device Technology IDT
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9FGV0631C image

The 9FGV0631C is a member of IDTs SOC-Friendly 1.8V very low-power PCIe clock family. The device has 6 output enables for clock management, 2 different spread spectrum levels in addition to spread off, and 2 selectable SMBus addresses.

• LP-HCSL outputs; save 12 resistors compared to standard PCIe devices
• 54mW typical power consumption; reduced thermal concerns
• Outputs can optionally be supplied from any voltage between 1.05V and 1.8V; maximum power savings
• OE# pins; support DIF power management
• Programmable slew rate for each output; allows tuning for various line lengths
• Programmable output amplitude; allows tuning for various application environments
• DIF outputs blocked until PLL is locked; clean system start-up
• Selectable 0%, -0.25% or -0.5% spread on DIF outputs; reduces EMI
• External 25MHz crystal; supports tight ppm with 0 ppm synthesis error
• Configuration can be accomplished with strapping pins; SMBus interface not required for device control
• 3.3V tolerant SMBus interface works with legacy controllers
• Selectable SMBus addresses; multiple devices can easily share an SMBus segment
• Space saving 5 x 5 mm 40-VFQFPN; minimal board space

Output Features
• 6 100MHz Low-Power (LP) HCSL DIF pairs
• 1 1.8V LVCMOS REF output w/Wake-On-LAN (WOL) support

Typical Applications
PCIe Gen1–4 clock generation for Riser Cards, Storage, Networking, JBOD, Communications, Access Points

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