Preliminary
GS8180Q18/36D-200/167/133
AC Test Load Diagram
DQ
RQ = 250 Ω (HSTL I/O)
50Ω
VT = VDDQ/2
Input and Output Leakage Characteristics
Parameter
Input Leakage Current
(except mode pins)
Symbol
IIL
Mode Pin Input Current
IINM
Output Leakage Current
IOL
Test Conditions
VIN = 0 to VDD
VDD ≥ VIN ≥ VIL
0 V ≤ VIN ≤ VIL
Output Disable,
VOUT = 0 to VDDQ
Min.
–2 uA
–100 uA
–2 uA
–2 uA
Max Notes
2 uA
2 uA
2 uA
2 uA
Programmable Impedance HSTL Output Driver DC Electrical Characteristics
Parameter
Symbol
Min.
Output High Voltage
VOH
VDDQ / 2
Output Low Voltage
VOL
Vss
Notes:
1. IOH = (VDDQ/2) / (RQ/5) +/– 15% @ VOH = VDDQ/2 (for: 150Ω ≤ RQ ≤ 300Ω).
2. IOL = (VDDQ/2) / (RQ/5) +/– 15% @ VOL = VDDQ/2 (for: 150Ω ≤ RQ ≤ 300Ω).
3. Parameter tested with RQ = 250Ω and VDDQ = 1.5 V or 1.8 V
Max.
VDDQ
VDDQ / 2
Units Notes
V
1,3
V
2,3
Rev: 2.00f 6/2002
17/29
© 2002, Giga Semiconductor, Inc.
Specifications cited are design targets and are subject to change without notice. For latest documentation contact your GSI representative.