CXA1875AP/AM
• I2C data write (Write from I2C controller to IC)
SDA
SCL
MSB
1
2
3
S
MSB
LSB HIZ
4
5
6
Address
AT L during write
MSB
HIZ
LSB HIZ
7
8
9
1
8
9
ACK
Sub Address
ACK
HIZ
1
8
9
1
8
9
DATA (n)
ACK
DATA (n+1)
ACK
DATA (n+2)
HIZ
HIZ
8
9
DATA
ACK
1
DATA
8
9
P
ACK
• I2C data read (Read from IC to I2C controller)
∗ The number of data that can be
transferred at a time is confined
to units of 8-bit that can be set
as required.
Sub Address is incremented
automatically.
SDA
At H during read
HIZ
SCL
1
S
6
7
8
9
1
Address
ACK
7
8
9
DATA
P
ACK
• Read timing
MSB
LSB
IC output SDA
SCL
9
1
2
3
4
5
6
7
8
9
Read timing
ACK
DATA
ACK
∗ Data read is performed with SCL rise.
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