uPSD3234A, uPSD3234BV, uPSD3233B, uPSD3233BV
Port Pin
Signal
Name
Pin No. In/Out
Basic
JTAG TMS 20
I JTAG pin
JTAG TCK 16
I JTAG pin
PC2
VSTBY
15
I/O General I/O port pin
PC3
TSTAT
14
I/O General I/O port pin
PC4
TERR_
9
I/O General I/O port pin
JTAG TDI
7
I JTAG pin
JTAG TDO
6
O JTAG pin
PC7
5
I/O General I/O port pin
PD1
CLKIN
3
I/O General I/O port pin
PD2
Vcc
Vcc
GND
GND
GND
NC
NC
NC
USB+
1
I/O General I/O port pin
12
50
13
29
69
10
11
17
71
Function
Alternate
1. PLD Macro-cell outputs
2. PLD inputs
3. SRAM stand by voltage in-
put (VSTBY)
4. SRAM battery-on indicator
(PC4)
5. JTAG pins are dedicated
pins
1. PLD I/O
2. Clock input to PLD and APD
1. PLD I/O
2. Chip select to PSD Module
52-PIN PACKAGE I/O PORT
The 52-pin package members of the uPSD323X
Devices have the same port pins as those of the
80-pin package except:
■ Port 0 (P0.0-P0.7, external address/data bus
AD0-AD7)
■ Port 2 (P2.0-P2.3, external address bus A8-
A11)
■ Port A (PA0-PA7)
■ Port D (PD2)
■ Bus control signal (RD,WR,PSEN,ALE)
Pin 5 requires a pull-up resistor (2kΩ for 3V
devices, 7.5kΩ for 5V devices) for all devices,
with or without USB function.
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