Electronic component search and free download site. Transistors,MosFET ,Diode,Integrated circuits
English
한국어
日本語
русский
简体中文
español
部品番号
コンポーネント説明
X28C512DMB-12 データシートの表示(PDF) - Intersil
部品番号
コンポーネント説明
メーカー
X28C512DMB-12
5V, Byte Alterable EEPROM
Intersil
X28C512DMB-12 Datasheet PDF : 25 Pages
First
Prev
11
12
13
14
15
16
17
18
19
20
Next
Last
X28C512, X28C513
Write Cycle Limits
SYMBOL
PARAMETER
t
WC
(Note 4)
t
AS
t
AH
t
CS
t
CH
t
CW
t
OES
t
OEH
t
WP
t
WPH
t
DV
t
DS
t
DH
t
DW
t
BLC
Write cycle time
Address setup time
Address hold time
Write setup time
Write hold time
CE pulse width
OE HIGH setup time
OE HIGH hold time
WE pulse width
WE High recovery
Data valid
Data setup
Data hold
Delay to next write
Byte load cycle
WE Controlled Write Cycle
Address
CE
t
AS
t
AH
t
CS
MIN
0
50
0
0
100
10
10
100
100
50
0
10
0.2
t
WC
t
CH
MAX
10
1
100
UNIT
ms
ns
ns
ns
ns
ns
ns
ns
ns
ns
µs
ns
ns
µs
µs
OE
t
OES
t
OEH
t
WP
WE
t
DV
Data In
Data Out
Data Valid
t
DS
t
DH
HIGH Z
NOTE:
4. t
WC
is the minimum cycle time to be allowed from the system perspective unless polling techniques are used. It is the maximum time the device
requires to complete the internal write operation.
15
FN8106.1
September 29, 2005
Share Link:
datasheetq.com [
Privacy Policy
]
[
Request Datasheet
] [
Contact Us
]