LP621024D-T Series
128K X 8 BIT CMOS SRAM
Features
Single +5V power supply
Access times: 55/70 ns (max.)
Current:
Very low power version: Operating: 70mA (max.)
Standby: 50µA (max.)
Full static operation, no clock or refreshing required
All inputs and outputs are directly TTL-compatible
Common I/O using three-state output
Output enable and two chip enable inputs for easy
application
Data retention voltage: 2V (min.)
Available in 32-pin DIP, SOP TSOP and TSSOP (8 X
13.4mm) packages
Pb-Free package only
All Pb-free (Lead-free) products are RoHS compliant
General Description
The LP621024D-T is a low operating current 1,048,576-bit
static random access memory organized as 131,072 words
by 8 bits and operates on a single 5V power supply.
Inputs and three-state outputs are TTL compatible and allow
for direct interfacing with common system bus structures.
Two chip enable inputs are provided for POWER-DOWN and
device enable and an output enable input is included for easy
interfacing.
Data retention is guaranteed at a power supply voltage as
low as 2V.
Product Family
Product Family
Operating
Temperature
VCC
Range
Speed
Power Dissipation
Data Retention Standby Operating
(ICCDR, Typ.) (ISB1, Typ.) (ICC2, Typ.)
LP621024D -25°C to +85°C 4.5V~5.5V 55ns / 70ns
0.5µA
2µA
10mA
1. Typical values are measured at VCC = 5.0V, TA = 25°C and not 100% tested.
2. Data retention current VCC = 2.0V.
Package
Type
32L DIP/
SOP/TSOP/
TSSOP
Pin Configurations
DIP
NC
1
A16
2
A14
3
A12
4
A7
5
A6
6
A5
7
A4
8
A3
9
A2
10
A1
11
A0
12
I/O1
13
I/O2
14
I/O3
15
GND
16
32 VCC
31 A15
30 CE2
29
WE
28 A13
27 A8
26 A9
25 A11
24 OE
23
A10
22 CE1
21
I/O8
20
I/O7
19
I/O6
18
I/O5
17
I/O4
NC
A16
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
I/O1
I/O2
I/O3
GND
SOP
1
32
2
31
3
30
4
29
5
28
6
27
7
26
8
25
9
24
10
23
11
22
12
21
13
20
14
19
15
18
16
17
VCC
A15
CE2
WE
A13
A8
A9
A11
OE
A10
CE1
I/O8
I/O7
I/O6
I/O5
I/O4
TSOP/(TSSOP)
16
1
17
32
Pin No.
1
2
3
4
5
6
7
8
9
10 11 12 13 14 15 16
Pin
Name
A11 A9 A8 A13 WE CE2 A15 VCC NC A16 A14 A12 A7 A6 A5 A4
Pin No.
17
18 19 20
21
22 23
24 25
26 27
28 29
30
31 32
Pin
Name
A3
A2
A1
A0 I/O1 I/O2 I/O3 GND I/O4 I/O5 I/O6 I/O7 I/O8 CE1 A10 OE
(July, 2005, Version 1.2)
1
AMIC Technology, Corp.