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部品番号
コンポーネント説明
LC89975M データシートの表示(PDF) - SANYO -> Panasonic
部品番号
コンポーネント説明
メーカー
LC89975M
PAL-Format Delay Line
SANYO -> Panasonic
LC89975M Datasheet PDF : 7 Pages
1
2
3
4
5
6
7
Control Pin
CONT
Low
High
Mode
(typical example)
PAL/GBI
4.43 NTSC
LC89975M
Chrominance signal delay
(number of CCD stages)
2H (1705) + 0H (2.5)
1H (847) + 0H (2.5)
Luminance signal delay
(number of CCD stages)
1H (849)
1H (843)
Switching levels
Low/High
Symbol
min
typ
max
Unit
Low
High
V
L
–0.3
0.0
+0.5
V
V
H
2.0
5.0
6.0
V
Note: Since a pull-down resistor of about 70 k
Ω
is built in the control pin circuit, it will remain fixed at the low level if
left open.
3fsc Pin
This pin outputs the 3·fsc clock signal generated by the PLL 3
×
circuit.
Electrical Characteristics
at V
DD
= 5.0 V, Ta = 25°C, F
CLK
= 4.43361875 MHz, V
CLK
= 500 mVp-p
Parameter
Power-supply current
Switch states
Symbol Test conditions
min
SW1
SW2
SW3
I
DD-1
1
I
DD-2
a
a
b
27
b
a
b
typ
max
Unit
32
37
mA
No. 5391-3/7
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