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NJU6624B データシートの表示(PDF) - Japan Radio Corporation

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NJU6624B Datasheet PDF : 35 Pages
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NJU6624A/B
Example of 2 dot smooth scroll
The smooth scroll sequence, which is executed by the 2dot-shift and 4dot-shift instruction, LCD display and DD
RAM address movement are shown as follows.
Power ON
Display ON/OFF
Write data to
DD RAM
< LCD Display >
<DD RAM address>
Setting address in (AC)
Scroll
RAM
1ch 2 3
10 11 12
00 01 02 ---- 09 0A 0B 0C 0D
RAM address set
Set the address
(0C)H to DDRAM
00 01 02 ---- 09 0A 0B 0C 0D
NOTE) The address set instruction for scroll RAM is not needed later on.
For example, the address (0D)‚ auto-increments to (00)‚ at the timing of the write to
RAM instruction, then the address (00)‚ returns to 1st line scroll RAM position by the
display shift instruction.
Write to RAM
write character code
to the address (0C)H
(0D)H.
Dot Shift
2dot-shift
00 01 02 ---- 09 0A 0B 0C 0D
Dot Shift
4dot-shift
00 01 02 ---- 09 0A 0B 0C 0D
Display Shift Seems to execute
2dot-shift
Write to RAM
write character code
to the address (00)H.
01 02 03 ---- 0A 0B 0C 0 D 00
Dot Shift
2dot-shift
Dot Shift
4dot-shift
Display Shift Seems to execute
2dot-shift
Write to RAM write character code
to the address (00)H.
01 02 03 ---- 0A 0B 0C 0D 00
01 02 03 ---- 0A 0B 0C 0D 00
02 03 04 ---- 0B 0C 0D 00 01

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