NJU6624AFG1 データシートの表示（PDF） - Japan Radio Corporation

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NJU6624AFG1

12-CHARACTER 1-LINE DOT MATRIX LCD CONTROLLER DRIVER with SMOOTH SCROLL FUNCTION

Japan Radio Corporation  

NJU6624A/B

Example of 3 dot smooth scroll (NJU6624A+NJU6624B 23-character,1-line Display)

The smooth scroll sequence, which is executed by the 3dot-shift instruction, LCD display and DD RAM address

movement are shown as follows. (NJU6624A(Master) and NJU6624B(Slave) useing.)

Power ON

Display ON/OFF

1ch 2 3

10 11 12 13 14 15

21 22 23

Write data to

<LCD Display>

DD RAM(Master)

<DD RAM address> 0 0 0 1 0 2 ---- 0 9 0 A 0 B 0 C 0 D

NJU6624A internal DDRAM

0 0 0 1 0 2 0 3 ---- 0 9 0 A 0 B 0C 0D

NJU6624 Binternal DDRAM

Write data to

DD RAM(Slave)

0 0 0 1 0 2 ---- 0 9 0 A 0 B 0C 0D

0 0 0 1 0 2 0 3 ---- 0 9 0 A 0 B 0C 0D

Note) DD RAM address for the scroll

RAM address set

(Master)

Set the address

(0C)H to DDRAM(Master)

operations incremented (+1) automatically

after the data write operation into RAM.

Therefore, the address set is not required

Write to RAM

(Master)

after the first address set.

Write the data same as data in the slave address

(01)H and (02)H into the DD RAM address (0C)H,

(0D)H for the master scroll RAM.

RAM address set Set the address

(Slave)

(0D)H to DDRAM(Slave)

Write to RAM write character code

(Slave)

to the address (0D)H.

Dot Shift

(Master, Slave)

3dot-shift

(Master and Slave)

0 0 0 1 0 2 ---- 0 9 0 A 0 B 0C 0D

0 0 0 1 0 2 0 3 ---- 0 9 0 A 0 B 0C 0D

Display Shift Seems to execute

(Master, Slave) 3dot-shift

0 1 0 2 0 3 ---- 0 A 0 B 0C 0D 0 0

to the next page

01 02 03 04 ---- 0A 0B 0C 0D 00

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