ELECTRICAL CHARACTERISTICS (Continued)
Characteristic
Symbol
VDD
V
VLCD
V
Min Typical Max
Unit
Frequencies
OSC2 Frequency @ R1; R1 = 200 kΩ fOSC2
5
5
100
—
150
kHz
BP Frequency @ R1
OSC2 Frequency @ R2; R2 = 996 kΩ
fBP
fOSC2
5
5
5
5
100
23
—
—
150
Hz
33
kHz
Average DC Offset Voltage (BP Relative to FP)
VOO
5
2.8
-50
—
+50
mV
Input Voltage
“0” Level
VIL
2.8
5
—
—
0.85
V
VIL
5.5
5
—
—
1.65
“1” Level VIH
2.8
5
2
—
—
VIH
5.5
5
3.85
—
—
Output Drive Current — Backplanes VO = 2.65 V
IBH *
IBL
5
2.8 -240
5
2.8 -240
—
—
VO = 0.15 V
IBH
5
2.8
260
—
IBL
5
2.8
260
—
VO = 1.08V
IBH
5
2.8
40
—
IBL
5
2.8
—
—
VO = 1.72 V
IBH
5
2.8
-40
—
IBL
5
2.8
—
—
VO = 5.35 V
IBH
IBL
5
5.5 -520
—
5
5.5 -520
—
VO = 0.15 V
IBH
5
5.5
600
—
IBL
5
5.5
600
—
VO = 1.98 V
IBH
5
5.5
55
—
IBL
5
5.5
—
—
—
µA
—
—
—
—
2
—
-1
—
—
—
—
—
1
VO = 3.52 V
IBH
5
5.5
-35
—
—
IBL
5
5.5
—
—
-1
Pulse Width, Data Clock
(Figure 1)
tw
5
3
100
—
100
—
—
ns
—
DCLK Rise/Fall Time
(Figure 1) tr, tf
5
3
—
—
120
µs
—
—
120
Setup Time, Din to DCLK
(Figure 2)
tsu
5
3
20
—
—
ns
20
—
—
Hold Time, Din to DCLK
(Figure 2)
th
5
3
40
—
—
ns
60
—
—
Hold Time for START condition
(Figure 2) tstart
5
3
100
—
100
—
—
ns
—
Hold Time for STOP condition
(Figure 2) tstop
5
3
100
—
100
—
—
ns
—
DCLK Low to ENB High
(Figure 3)
th
5
3
20
—
—
ns
20
—
—
ENB High to DCLK High
(Figure 3) trec
5
3
20
—
—
ns
20
—
—
ENB High Pulse Width
(Figure 3)
tw
5
3
100
—
100
—
—
ns
—
ENB Low to DCLK High
(Figure 3)
tsu
5
3
20
—
—
ns
20
—
—
NOTE: Timing for Figures 1, 2, and 3 are design estimates only.
* For a time (t = 4/OSC FREQ.) after the backplane waveform changes to a new voltage level, the circuit is maintained in the high-current state to
allow the load capacitances to charge quickly. The circuit is then returned to the low-current state until the next voltage change.
MOTOROLA
MC14LC5002 • MC14LC5003 • MC14LC5004
3–7