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MCM69F735ZP7 データシートの表示(PDF) - Motorola => Freescale
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MCM69F735ZP7
128K x 36 Bit Flow–Through BurstRAM™ Synchronous Fast Static RAM
Motorola => Freescale
MCM69F735ZP7 Datasheet PDF : 16 Pages
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STOP CLOCK WITH WRITE TIMING
K
ADSC
ADDRESS
A1
A2
WRITE
ADV
DATA IN
D(A1)
D(A1+1)
VIH OR VIL FIXED (SEE NOTE)
D(A2)
HIGH–Z
DQx
ADSC
(INITIATES
BURST WRITE)
CLOCK STOP
(CONTINUE
BURST WRITE)
WAKE UP ADSC
(INITIATES BURST WRITE)
NOTE: While the clock is stopped, DATA IN must be fixed in a high (VIH) or low (VIL) state to reduce the DC current of the input
buffers. For lowest power operation, all data and address lines should be held in a low (VIL) state and control lines held
in an inactive state.
MOTOROLA FAST SRAM
MCM69F735
13
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