UPD488448FF-C80-45-DQ1 データシートの表示（PDF） - NEC => Renesas Technology
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UPD488448FF-C80-45-DQ1 Datasheet PDF : 80 Pages
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µPD488448 for Rev. P
Figure 5-1 Mapping between COLM Packet and D Packet for WR Command
T0 T1 T2 T3 T4 T5 T6 T7 T8 T9 T10 T11T12T13 T14 T15 T16T17 T18 T19 T20T21 T22 T23 T24T25 T26 T27T28T29 T30 T31 T32T33 T34 T35 T36T37 T38 T39 T40T41 T42 T43T44T45 T46 T47
CTM/CFM
ROW2
..ROW0
ACT a0
COL4
..COL0
DQA7..0
DQB7..0
Transaction a: WR
WR a1
tRTR
retire (a1)
MSK (a1)
tCWD
D (a1)
PRER a2
ACT b0
a0 = {Da,Ba,Ra}
a1 = {Da,Ba,Ca1}
a3 = {Da,Ba}
COLM Packet
D Packet
T17
T18
T19
T20
T19
T20
T21
T22
CTM/CFM
CTM/CFM
COL4
COL3
COL2
COL1
COL0
MA7 MA5 MA3 MA1
M=1 MA6 MA4 MA2 MA0
MB7 MB4 MB1
MB6 MB3 MB0
MB5 MB2
DQB7 DB7 DB15 DB23 DB31 DB39 DB47 DB55 DB63
DQB6
•
•
•
DQB1
DB6 DB14 DB22 DB30 DB38 DB46 DB54 DB62
DB1 DB9 DB17 DB25 DB33 DB41 DB49 DB57
DQB0 DB0 DB8 DB16 DB24 DB32 DB40 DB48 DB56
When M=1, the MA and MB
fields control writing of
individual data bytes.
When M=0, all data bytes are
written unconditionally.
Each bit of the MB7..MB0 field
controls writing (=1) or no writing
(=0) of the indicated DB bits when
the M bit of the COLM packet is one.
DQA7
MB0 MB1 MB2 MB3 MB4 MB5 MB6 MB7
DA7 DA15 DA23 DA31 DA39 DA47 DA55 DA63
DQA6
•
•
•
DQA1
DA6 DA14 DA22 DA30 DA38 DA46 DA54 DA64
DA1 DA9 DA17 DA25 DA33 DA41 DA49 DA57
Each bit of the MA7..MA0 field
controls writing (=1) or no writing
DQA0
(=0) of the indicated DA bits when
the M bit of the COLM packet is one.
DA0 DA8 DA16 DA24 DA32 DA40 DA48 DA56
MA0 MA1 MA2 MA3 MA4 MA5 MA6 MA7
16
Data Sheet M14837EJ3V0DS00
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