SST45VF010 データシートの表示（PDF） - Silicon Storage Technology
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SST45VF010 Datasheet PDF : 16 Pages
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512 Kbit / 1 Mbit / 2 Mbit Serial Flash
SST45VF512 / SST45VF010 / SST45VF020
Advance Information
WP#
1
8
RESET#
1
VDD
2 Standard Pinout 7
VSS
Top View
CE#
3
6
SO
2
Die Up
SCK
4
5
SI
3
FIGURE 1: PIN ASSIGNMENTS FOR 8-PIN SOIC
514 ILL F01.0
4
TABLE 2: PIN DESCRIPTION
5
Symbol Pin Name
Functions
SCK
Serial Clock
To provide the timing of the serial interface. Commands, addresses, or
input data are latched on the rising edge of the clock input, while output
6
data is shifted out on the falling edge of the clock input.
SI
Serial Data Input To transfer commands, addresses, or data serially into the device. Inputs
are latched on the rising edge of the serial clock.
7
SO
Serial Data Output To transfer data serially out of the device. Data is shifted out on the
falling edge of the serial clock.
8
CE#
Chip Enable
The device is enabled by a high to low transition on CE#.
WP#
Write Protect
To protect the device from unintentional Write (Erase or Program)
operations. When WP# is low, all Erase and Program commands are
ignored. When WP# is high, the device may be erased or programmed.
9
This pin has an internal pull-up and could remain unconnected when not used.
RESET# Reset
A high to low transition on RESET# will terminate any operation in progress
and reset the internal logic to the standby mode. The device will remain in the
10
reset condition as long as the RESET# is low. Operations may only occur
when RESET# is high. This pin has an internal pull-up and could remain
unconnected when not used.
11
VDD
Power Supply
To provide power supply (2.7-3.6V).
VSS
Ground
514 PGM T2.2
12
13
14
15
16
© 2000 Silicon Storage Technology, Inc.
3
S71178
514-1 10/00
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