CXD2424R データシートの表示（PDF） - Sony Semiconductor

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CXD2424R

Timing Generator for Progressive Scan CCD Image Sensor

Sony Semiconductor 

CXD2424R

5-2. Direct reset

In the direct reset mode, when the reset signal is input for resetting, a sync signal is output, but there is no

continuous output.

There are two direct reset modes: one to direct reset VD only, and one to reset both HD and VD. (However,

note that even for V reset, the HD signal is acceptable and the reset timing is the same as in normal reset

mode.) In both modes, the VD reset timing is the same.

When the external input V reset signal VRI fall is detected, a judgment is made as to ODD or EVEN. If ODD, V

is reset to cause VDO to fall simultaneously in the middle of HD, and if EVEN, V is reset to cause VDO to fall

simultaneously with HD fall. VRI requires a minimum pulse width of 2H.

H direct reset detects the fall of H reset signal HRI, and resets H so that HDO falls at the next CL falling edge.

The minimum HRI reset pulse width is 0.3µs.

Resetting is done for ODD or EVEN field, depending on the input timing of the V reset signal. The identification

timing is shown in Electrical Characteristics.

5-2-1. V reset

HRI

HDO

VRI

VDO

FIELD.E

FIELD.O

7.5H

HRI

HDO

VRI

VDO

FIELD.O

FIELD.E

7.5H

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