TEA1024 データシートの表示（PDF） - Temic Semiconductors
部品番号
コンポーネント説明
メーカー
TEA1024 Datasheet PDF : 8 Pages
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TEA1024/ TEA1124
2
GND 6
–
Protection
+
Rx
50 kW
1
W Ry 150 k
4
–VS
4 stage
ripple counter
D/A converter
23
A
22
Period
D
21
20 ms
20
(40 ms)
Current sink
Divider
1:2
(1:4)
7
Sync (50 Hz)
95 11411
Figure 4. Principle diagram – Generation and evaluation of ramp
Period
1. The time required for one complete cycle of a regular.
repeating signal, function, or series of emends.
2. The tune between two consecutive transients of the
pointer or indicating means of an electrical indicating
instrument in the same disdain the rest position.
Something called periodic fine.
Comparator
The comparison of set value and measured value is
carried out via the two comparator inputs Pin 1 and Pin 2.
Here Pin 2 is the inverting input and has a circuit pro-
tecting it against interference spikes. Figure 5 shows the
protective circuit of the comparator. Pin 1 is the non-
inverting input.
1
Ramp
generator
6
Firing Pulse Width (Figures 6, 7)
It depends on the latching current as well as on the load
current of the used triacs.
+ p Ǹ tp [s]
3
4
f
arcsin IL
P
VM
2
whereas IL[A] = Latching current of the triac
VM[V]= Mains voltage, effective
P[W] = Power load
f[1/s] = Mains frequency
Firing pulse width is specified through the zero cross over
identification which can be influenced by the sync.
resistance.
W + Ǹ ǒ Rsync [ ]
VM
2
sin
2
3
2.5
w Ǔtp
10–5
– 0.6
–1.4
103
where
tp [s] = required ignition pulse width
GND
R
Z
T
2
+
–
95 11412
Figure 5. Protective circuit of the comparator
TELEFUNKEN Semiconductors
3 (8)
Rev. A1, 24-May-96
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