Z80182 データシートの表示（PDF） - Zilog

部品番号

コンポーネント説明

メーカー

Z80182

ZILOG INTELLIGENT PERIPHERAL CONTROLLER (ZIP™)

Zilog 

Zilog

PRELIMINARY

Z182 MPU CONTROL REGISTERS

Figures 10 through 50 refer to the Z80182/Z8L182 MPU

Control registers. For additional information, refer to the

Z8S180 Product Specification and Technical Manual.

Z80182/Z8L182

ZILOG INTELLIGENT PERIPHERAL

ASCI CHANNELS CONTROL REGISTERS

CNTLA0

Bit MPE RE

Upon RESET

R/W

0

0

R/W R/W

Addr 00H

TE

/RTS0

MPBR/

EFR

MOD2

MOD1

MOD0

0

1

x

0

0

0

R/W R/W R/W R/W R/W R/W

MODE Selection

0

0

0 Start + 7-Bit Data + 1 Stop

0

0

1 Start + 7-Bit Data + 2 Stop

0

1

0 Start + 7-Bit Data + Parity + 1 Stop

0

1

1 Start + 7-Bit Data + Parity + 2 Stop

1

0

0 Start + 8-Bit Data + 1 Stop

1

0

1 Start + 8-Bit Data + 2 Stop

1

1

0 Start + 8-Bit Data + Parity + 1 Stop

1

1

1 Start + 8-Bit Data + Parity + 2 Stop

Read - Multiprocessor Bit Receive

Write - Error Flag Reset

Request To Send

Transmit Enable

Receive Enable

Multiprocessor Enable

Figure 10a. ASCI Control Register A (Ch. 0)

DS971820600

PS009801-0301

3-29

Share Link: