TC850CPL データシートの表示（PDF） - TelCom Semiconductor Inc => Microchip

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TC850CPL

15-BIT, FAST-INTEGRATING CMOS ANALOG-TO-DIGITAL CONVERTER

TelCom Semiconductor Inc => Microchip 

15-BIT, FAST-INTEGRATING CMOS

ANALOG-TO-DIGITAL CONVERTER

1

INTERNAL

CLOCK

. CS CE

WR

BUSY

....

........

TC850

2

1100 CLOCK CYCLES

WR PULSES ARE IGNORED

319 CLOCK

CYCLES

836 CLOCK CYCLES

NEXT CONVERT

COMMAND WILL

BE RECOGNIZED

125 CLOCK

CYCLES

NEXT

CONVERSION

CAN BEGIN

3

DB0-DB7

PREVIOUS CONVERSION

DATA VALID

DATA MEANINGLESS

NEW CONVERSION DATA VALID

. CS CE

RD

Figure 9. Conversion Timing, Demand Mode

tDHC

tCE

tRE

*

tDHR

4

5

DB0-DB6

HI-Z

DATA BITS 8 TO 14

DATA BITS

0 T0 6

HIGH IMPEDANCE

DB7

HI-Z

OVR/POL

L/H

"1"= INPUT

OVERRANGE

tOP

"1"= POSITIVE

POLARITY

tLH

DATA BIT 7

HIGH IMPEDANCE

DONT' CARE

DONT' CARE

NOTE: CONT/DEMAND = LOW

*RD (as well as CS and CE) can go HIGH after each byte is read (i.e., in a µP bus interface)

or remain LOW during the entire DATA-READ sequence (i.e., µP I/O port interface).

Figure 10. Bus Output Timing, Demand Mode

TELCOM SEMICONDUCTOR, INC.

6

7

8

3-89

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