SSD1881T1R1(Rev2_0) データシートの表示（PDF） - Solomon Systech
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SSD1881T1R1 Datasheet PDF : 32 Pages
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SHL (Input Pin)
This is an input pin and is used to select the output shift direction and to configure CIO1 and CIO2. Below table
shows the relationship between SEL, SHL, CIO1, CIO2 and the output shift direction.
SEL = L (160 common outputs)
SHL
L
H
Output Shift Direction CIO
COM0 -> COM159 Input
COM159 -> COM0 Output
SEL = L (140 common outputs)
CIO2
Output
Input
SHL Output Shift Direction CIO CIO2
L
COM8 -> COM147 Input Output
H
COM147 -> COM8 Output Input
Table 6 - Relationship between SEL, SHL, CIO2 and CIO2
LSEL (Input Pin)
This is an input pin and is used to select 1P Normal Operation or 1/2P Operation. That can cope with different
LCD having different response time.
When LSEL is set at “L” level, 1P Normal Operation is selected. when LSEL is set at “H” level, 1/2P Operation is
selected.
CSEL (Input Pin)
This is a chip select signal input. When only one common driver is used, CSEL should be set at “L” level. When
multiple common drivers are used, CSEL of the leading chip must be tied to “L” level and that of other chips must
be tied to “H” level.
TEST1 (Input Pin)
This is a reserved pin and it must be set at “L” level in the normal operation.
TEST2 (Input Pin, only exists on gold-bumped die)
This is a reserved pin and it must be set at “L” level in the normal operation.
COM0-COM159 (Output Pin)
These are output pins and provide common driving signals to the LCD panel. Output transition occurs at the falling
edge of LP.
NCx and DUMCORx (Dummy Pin)
These are NC pins and dummy pins. They must be left open & unconnected. Don’t group the NC pins or dummy
pins together.
Note 1: If an MLA LCD system is formed by SSD1881 row driver, SSD1870 column driver and SSD1730 power chip, 1nF capacitors are
necessary for the capacitor coupling purpose. Refer to the Application example for circuit connection.
SSD1881
13
Rev 2.0
05/2002
SOLOMON
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