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ASCELL3911 データシートの表示(PDF) - austriamicrosystems AG

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ASCELL3911
AmsAG
austriamicrosystems AG AmsAG
ASCELL3911 Datasheet PDF : 13 Pages
First Prev 11 12 13
ISM 868 MHz, 433 MHz and 315 MHz FSK Transmitter – Preliminary Data Sheet
ASCell3911
Austria Mikro Systeme International AG
Pin Name
Type Description
4 RESET / O
TEST
Power-On-Reset output
Test output in test mode
5 XTAL
A
XTAL oscillator input
6 VDDSYN P
PLL, mixer positive supply
7 GNDSYN P
PLL, mixer, negative supply
8 GND
P
Negative supply of DC/DC, POR, LBAT, XOSC, Data Interface, SinCos
9 uC_CLK O
Clock output for micro-controller
10 WAKEUP I
Wake-up signal, pos. edge wakes up the chip, negative edge stops transmis-
sion
11 D_CLK
I
Data clock, data is clocked into the chip with negative edge of DCLK
12 D_EN
I
Data enable, high while data is clocked into the chip
13 DATA
I
Data input for 128 bits of FSK data preceeded by 8 control bits
14 VDD
P
Positive supply of DC/DC, POR, LBAT, XOSC, Data Interface, SinCos
4 Application Schematic
PAGND
DC to 80 kHz
RF+
f =868.300 MHz
RF
DRA QUC 2*BBF SCG
Implementation
Example
RF- Driving
Amplifier.
Quadrature
Up Converter
0 ° 90°
+/-45°
Baseband
Filters
Sin / Cos
Generator
RF_LO = f
RF
VCO LPF DIV PHD
Protocol
Encoder
Transmit.
Timing
XTO
D_EN
D_CLK
DATA
WAKEUP
µC_CLK
Reset/Test
DVCC
DVCC
Local
Oscillator
VDDSYN
VDDSYN
f/64
Loop-filter
GNDSYN
Phase Detector
DGND
XTAL
DGND
Oscillator
XTAL
G. Schultes, ISM868_TX
Revision: 0, 99 07 16
GNDSYN
Figure 6: Basic application schematic of the ASCell3911.
Rev. A, February 2000
Page 12 of 13

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