A290021UL-70 データシートの表示（PDF） - AMIC Technology

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A290021UL-70

256K X 8 Bit CMOS 5.0 Volt-only, Boot Sector Flash Memory

AMIC Technology 

A29002/A290021 Series

Hardware Reset (RESET ) (N/A on A290021)

Parameter

JEDEC Std

tREADY

tREADY

tRP

tRH

Description

RESET Pin Low (During Embedded

Algorithms) to Read or Write (See Note)

RESET Pin Low (Not During Embedded

Algorithms) to Read or Write (See Note)

RESET Pulse Width

RESET High Time Before Read (See Note)

Note: Not 100% tested.

RESET Timings

CE, OE

tRH

RESET

Test Setup

Max

Max

Min

Min

All Speed Options

Unit

20

µs

500

ns

500

ns

50

ns

RESET

tRP

tReady

Reset Timings NOT during Embedded Algorithms

Reset Timings during Embedded Algorithms

tRP

Temporary Sector Unprotect (N/A on A290021)

Parameter

JEDEC Std

tVIDR

Description

VID Rise and Fall Time (See Note)

tRSP RESET Setup Time for Temporary Sector

Unprotect

Note: Not 100% tested.

All Speed Options

Unit

Min

500

ns

Min

4

µs

Temporary Sector Unprotect Timing Diagram

12V

0 or 5V

RESET

tVIDR

CE

Program or Erase Command Sequence

tVIDR

0 or 5V

WE

tRSP

(February, 2002, Version 1.0)

18

AMIC Technology, Inc.

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