HYB5117405BJ-50 データシートの表示（PDF） - Siemens AG

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HYB5117405BJ-50

4M x 4-Bit Dynamic RAM 2k & 4k Refresh (Hyper Page Mode- EDO)

Siemens AG 

HYB5116(7)405BJ/BT-50/-60/-70

4M x 4-EDO DRAM

V

IH

RAS

VIL

tRCD

CAS

tCRP

V

IH

VIL

tCSH

tRAS

tHPC

tCAS

tCP

tCAS

tRHCP

tRSH

tCAS

tRAL

Address

tASR tRAH tASC tCAH

V

IH

VIL

Row

Addr

Column 1

tRAD

tCWL

tASC tCAH

Column 2

tCWL

VIH

WE

VIL

tWCS

tWCH tWCS

tWP

tWCH

tWP

tASC tCAH

Column N

tWCS

tRWL

tCWL

tWCH

tWP

tRP

tCRP

V

OH

OE

VOL

V

IH

I/O (Input) VIL

tDS

tDH

Data In 1

“H” or “L”

tDS tDH

Data In 2

tDS tDH

Data In N

WL8

Hyper Page Mode (EDO) Early Write Cycle

Semiconductor Group

17

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