MAX1510ETB データシートの表示（PDF） - Maxim Integrated
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MAX1510ETB Datasheet PDF : 13 Pages
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MAX1510/MAX17510
Low-Voltage DDR Linear Regulators
The MAX1510/MAX17510 feature an open-drain PGOOD
output that transitions high 2ms after the output initially
reaches regulation. PGOOD goes low within 10μs of
when the output goes out of regulation by ±150mV. The
MAX1510/MAX17510 feature current- and thermal-limiting
circuitry to prevent damage during fault conditions.
3.3V Bias Supply (VCC)
The VCC input powers the control circuitry and provides the
gate drive to the pass transistor. This improves efficiency
by allowing VIN to be powered from a lower supply voltage.
Power VCC from a well-regulated 3.3V supply. Current
drawn from the VCC supply remains relatively constant
with variations in VIN and load current. Bypass VCC with
a 1μF or greater ceramic capacitor as close as possible to
the device.
VCC Undervoltage Lockout (UVLO)
The VCC input undervoltage-lockout (UVLO) circuitry
ensures that the regulator starts up with adequate volt-
age for the gate-drive circuitry to bias the internal pass
transistor. The UVLO threshold is 2.55V (typ). VCC must
remain above this level for proper operation.
Power-Supply Input (IN)
IN provides the source current for the linear regulator’s
output, OUT. IN connects to the drain of the internal
n-channel power MOSFET. IN can be as low as 1.1V,
minimizing power dissipation. The input UVLO prohibits
operation below 0.8V (typ). Bypass IN with a 10μF or
greater capacitor as close as possible to the device.
Reference Input (REFIN)
The MAX1510/MAX17510 regulate OUTS to the volt-
age set at REFIN, making the devices ideal for memory
applications where the termination supply must track the
supply voltage. Typically, REFIN is set by an external
resistive voltage-divider connected to the memory supply
(VDDQ) as shown in Figure 1. The maximum output voltage
of 1.5V is limited by the gate-drive voltage of the internal
n-channel power transistor.
Buffered Reference Output (REFOUT)
REFOUT is a unity-gain transconductance amplifier that
generates the DDR reference supply. It sources and
sinks greater than 5mA. The reference buffer is typically
connected to ceramic bypass capacitors (0.33μF to
1.0μF). REFOUT is active when VREFIN > 0.45V and VCC
is above VUVLO. REFOUT is independent of SHDN.
Shutdown
Drive SHDN low to disable the error amplifier, gate-drive
circuitry, and pass transistor (Figure 2). In shutdown, OUT
is terminated to GND with an 8Ω MOSFET. REFOUT is
independent of SHDN. Connect SHDN to VCC for normal
operation.
Current Limit
The MAX1510/MAX17510 feature source and sink
current limits to protect the internal n-channel MOSFETs.
The source and sink MOSFETs have a typical 3A
current limit (1.8A min). This current limit prevents damage
to the internal power transistors, but the device can enter
thermal shutdown if the power dissipation increases the
die temperature above +165°C (see the Thermal-Overload
Protection section).
Soft-Start Current Limit
Soft-start gradually increases the internal source current
limit to reduce input surge currents at startup. Full-source
current limit is available after the 200μs soft-start timer
has expired. The soft-start current limit is given by:
ILIMIT(SS)
=
I LIMIT
t SS
×
t
where ILIMIT and tSS are from the Electrical Characteristics.
Thermal-Overload Protection
Thermal-overload protection prevents the linear regula-
tor from overheating. When the junction temperature
exceeds +165°C, the linear regulator and reference
buffer are disabled, allowing the device to cool. Normal
operation resumes once the junction temperature cools
by 15°C. Continuous short-circuit conditions result in a
pulsed output until the overload is removed. A continuous
thermal-overload condition results in a pulsed output. For
continuous operation, do not exceed the absolute maxi-
mum junction-temperature rating of +150°C.
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