MAX5250 データシートの表示（PDF） - Maxim Integrated

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MAX5250

Low-Power, Quad, 10-Bit Voltage-Output DAC with Serial Interface

Maxim Integrated 

Low-Power, Quad, 10-Bit Voltage-Output DAC

with Serial Interface

REF_

DAC_

MAX5250

VL

IOUT

OUT_ 2N3904

FB_

R

Figure 13. Digitally Programmable Current Source

Power-Supply Considerations

On power-up, all input and DAC registers are cleared

(set to zero code) and DOUT is in Mode 0 (serial data

is shifted out of DOUT on the clock’s falling edge).

For rated MAX5250 performance, limit REFAB/REFCD

to less than 1.4V below VDD. Bypass VDD with a 4.7µF

capacitor in parallel with a 0.1µF capacitor to AGND.

Use short lead lengths and place the bypass capaci-

tors as close to the supply pins as possible.

Grounding and Layout Considerations

Digital or AC transient signals between AGND and

DGND can create noise at the analog outputs. Tie

AGND and DGND together at the DAC, then tie this

point to the highest-quality ground available.

Good printed circuit board ground layout minimizes

crosstalk between DAC outputs, reference inputs, and

digital inputs. Reduce crosstalk by keeping analog

lines away from digital lines. Wire-wrapped boards are

not recommended.

__________________Pin Configuration

TOP VIEW

AGND 1

FBA 2

OUTA 3

OUTB 4

FBB 5

REFAB 6

CL 7

CS 8

DIN 9

SCLK 10

MAX5250

20 VDD

19 FBD

18 OUTD

17 OUTC

16 FBC

15 REFCD

14 PDL

13 UPO

12 DOUT

11 DGND

DIP/SSOP

______________________________________________________________________________________ 15

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