MAX5312 データシートの表示（PDF） - Maxim Integrated
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MAX5312 Datasheet PDF : 19 Pages
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±10V, 12-Bit, Serial, Voltage-Output DAC
TIMING CHARACTERISTICS
(VDD = +15V, VSS = -15V or 0V, VCC = +2.7V to +5.5V, AGND = DGND = SGND = 0, VREF = 5V, RLOAD = 2kΩ, CLOAD = 250pF, TA
= TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.)
PARAMETER
SYMBOL
CONDITIONS
MIN TYP MAX UNITS
SCLK Frequency
10
MHz
SCLK Clock Period
SCLK Pulse-Width High
SCLK Pulse-Width Low
CS Fall to SCLK Rise Setup Time
SCLK Rise to CS Rise Hold Time
DIN Setup Time
DIN Hold Time
LDAC Pulse Width
CS Rise to LDAC Low Setup Time
SCLK Fall to DOUT Valid
Propagation Delay
SCLK Rise to CS Fall Delay
CS Low to DOUT Valid Time
CS High to DOUT Disabled Time
CS Rise to SCLK Rise Hold Time
CS Pulse-Width High
CLR Pulse-Width Low
tCP
tCH
tCL
tCSS
tCSH
tDS
tDH
tLD
tLDS
tDO1
tCS0
tCSE
tCSD
tCS1
tCSW
tCLR
For nondaisy-chain use
For nondaisy-chain use
+2.7V ≤ VCC ≤ +3.6V
+4.5V ≤ VCC ≤ +5.5V
+2.7V ≤ VCC ≤ +3.6V
+4.5V ≤ VCC ≤ +5.5V
CLOAD = 20pF, +2.7V ≤ VCC ≤ +3.6V
CLOAD = 20pF, +4.5V ≤ VCC ≤ +5.5V
CLOAD = 20pF
+2.7V ≤ VCC ≤ +3.6V
+4.5V ≤ VCC ≤ +5.5V
100
ns
45
ns
45
ns
40
ns
15
ns
10
20
ns
10
ns
50
ns
100
ns
50
100
ns
80
10
ns
120
ns
120
ns
50
ns
200
ns
100
50
ns
Note 1: Output unloaded, digital inputs = VCC or DGND.
Note 2: ΔVDD = +14.5V to +15.5V, ΔVSS = -15.5V to -14.5V, code = FFF.
Note 3: Measured from code 14hex to FFFhex.
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