¡ Semiconductor
MSM514212
Notes:
1. The input voltage reference levels stipulated in the timing specification are VIH =
3.0 V and VIL = 0 V. The tT is the transition time between VIH = 3.0 V and VIL = 0
V.
2. Rise and fall time tT of all the cycles is specified as 5 ns.
3. During asynchronous execution of write and read operation, the difference between
the write address and read address must be greater than 40.
4. Since the MSM514212 uses a dynamic memory cell, it can read the data of the
written address within 10 ms after the write cycle at that address is completed.
5. The load condition for measurement is based on 1 TTL + 30 pF.
6. All the potential to the power supply/grounding terminals needs to be supplied.
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