MT46V128M4TG-8L データシートの表示（PDF） - Micron Technology
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MT46V128M4TG-8L Datasheet PDF : 68 Pages
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ADVANCE
512Mb: x4, x8, x16
DDR SDRAM
CK#
CK
COMMAND
ADDRESS
DQS
T0
READ
Bank,
Col n
T1 T2 T2n T3 T3n T4 T4n T5 T5n
READ
READ
READ
NOP
NOP
Bank,
Col x
CL = 2
Bank,
Col b
Bank,
Col g
DQ
CK#
CK
COMMAND
ADDRESS
DQS
T0
READ
Bank,
Col n
DO
DO
DO
n
n'
x
DO
DO
x'
b
DO
DO
b'
g
T1
T2 T2n T3 T3n T4 T4n T5 T5n
READ
READ
READ
NOP
NOP
Bank,
Col x
CL = 2.5
Bank,
Col b
Bank,
Col g
DQ
DO
DO
DO
DO
DO
DO
n
n'
x
x'
b
b'
DON’T CARE
TRANSITIONING DATA
NOTE: 1. DO n (or x or b or g) = data-out from column n (or column x or column b or column g).
2. Burst length = 2 or 4 or 8 (if 4 or 8, the following burst interrupts the previous).
3. n' or x' or b' or g' indicates the next data-out following DO n or DO x or DO b or DO g, respectively.
4. READs are to an active row in any bank.
5. Shown with nominal tAC, tDQSCK, and tDQSQ.
Figure 10
Random READ Accesses
512Mb: x4, x8, x16 DDR SDRAM
512Mx4x8x16DDR_B.p65 – Rev. B; Pub 4/01
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©2001, Micron Technology, Inc.
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