R80C188XL-25 データシートの表示（PDF） - Intel

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R80C188XL-25

16-BIT HIGH-INTEGRATION EMBEDDED PROCESSORS

Intel 

80C186XL 80C188XL

80C186XL 80C188XL EXPRESS

The Intel EXPRESS system offers enhancements to

the operational specifications of the 80C186XL mi-

croprocessor EXPRESS products are designed to

meet the needs of those applications whose operat-

ing requirements exceed commercial standards

The 80C186XL EXPRESS program includes an ex-

tended temperature range With the commercial

standard temperature range operational character-

istics are guaranteed over the temperature range of

0 C to a70 C With the extended temperature range

option operational characteristics are guaranteed

over the range of b40 C to a85 C

Package types and EXPRESS versions are identified

by a one or two-letter prefix to the part number The

prefixes are listed in Table 10 All AC and DC specifi-

cations not mentioned in this section are the same

for both commercial and EXPRESS parts

Table 10 Prefix Identification

Prefix

Package

Type

Temperature

Range

A

PGA

Commercial

N

PLCC

Commercial

R

LCC

Commercial

S

QFP

Commercial

SB

SQFP

Commercial

TA

PGA

Extended

TN

PLCC

Extended

TR

LCC

Extended

TS

QFP

Extended

80C186XL 80C188XL EXECUTION

TIMINGS

A determination of program execution timing must

consider the bus cycles necessary to prefetch in-

structions as well as the number of execution unit

cycles necessary to execute instructions The fol-

lowing instruction timings represent the minimum ex-

ecution time in clock cycles for each instruction The

timings given are based on the following assump-

tions

 The opcode along with any data or displacement

required for execution of a particular instruction

has been prefetched and resides in the queue at

the time it is needed

 No wait states or bus HOLDs occur

 All word-data is located on even-address bound-

aries (80C186XL only)

All jumps and calls include the time required to fetch

the opcode of the next instruction at the destination

address

All instructions which involve memory accesses can

require one or two additional clocks above the mini-

mum timings shown due to the asynchronous hand-

shake between the bus interface unit (BIU) and exe-

cution unit

With a 16-bit BIU the 80C186XL has sufficient bus

performance to ensure that an adequate number of

prefetched bytes will reside in the queue (6 bytes)

most of the time Therefore actual program execu-

tion time will not be substantially greater than that

derived from adding the instruction timings shown

The 80C188XL 8-bit BIU is limited in its performance

relative to the execution unit A sufficient number of

prefetched bytes may not reside in the prefetch

queue (4 bytes) much of the time Therefore actual

program execution time will be substantially greater

than that derived from adding the instruction timings

shown

41

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