NJU6682 データシートの表示（PDF） - Japan Radio Corporation

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NJU6682

160-common x 132-segment DOT MATRIX LCD DRIVER FOR 4 GRAY SCALE

Japan Radio Corporation  

NJU6682

(3)Explanation of Instruction Code

3-1)Display ON/OFF

This instruction executes whole display ON/OFF without relationship of the data in the Display Data RAM and internal

conditions.

(R/W)

A0 RD WR D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0

01000000000* * * * * * *D

* : Don’t Care

D=0:Display OFF

D=1:Display ON

3-2)Z Address Set

This instruction sets the line address of Display Data RAM which correspond to COM0 terminal (Normally, it means the

most upper line of the display ). The display area is only the number of lines which is equivalent to display duty in the

increasing direction from the line address is automatically.

At that time, the data of Display Data RAM isn’t changed at all. When the RAM mapping is set to Variable RAM

Mapping Mode, the status of Variable RAM Mapping takes priority over this instruction. Therefore, the status of this Z

Address Set instruction will be unavailable.

(R/W)

A0 RD WR D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0

0 1 0 0 0 1 0 1 0 1 A8 A7 A6 A5 A4 A3 A2 A1 A0

R/W

A8 A7 A6 A5 A4 A3 A2 A1 A0

000000000

000000001

:

:

:

100111110

100111111

Z Address (HEX)

0

1

:

:

:

13E

13F

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