VSC7216UC-01 データシートの表示（PDF） - Vitesse Semiconductor

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VSC7216UC-01

Multi-Gigabit Interconnect Chip

Vitesse Semiconductor 

VITESSE

SEMICONDUCTOR CORPORATION

Preliminary Datasheet

VSC7216-01

Multi-Gigabit Interconnect Chip

Compatibility with VSC7214 and VSC7211

Care has been taken in the functional definition of the VSC7216-01 to ensure that it is compatible with the

VSC7211 and VSC7214 at the serial link level, and that the transmitter and receiver low-speed interfaces have

compatible modes of operation. It is strongly recommended that the VSC7216-01 not be connected in any way

through the WSO and/or WSI pins to a VSC7211 or VSC7214.

Serial Link Compatibility

The VSC7216-01 uses the same Fibre Channel 8b/10b encoding scheme and the same Word Sync Sequence

used in the VSC7211 and VSC7214. The only difference in serial link operation is that the VSC7211 and

VSC7214 require four consecutive identically-aligned “Comma” patterns to set the character framing boundary,

while the VSC7216-01 requires a single “Comma.” This means that from the LOSS_OF_SYNC state, the

VSC7216-01 will make an earlier transition to the RESYNC state (one “Comma” instead of four) as shown in

Figure 9. Once out of the LOSS_OF_SYNC state, there is no difference in receiver behavior in the absence of

data link errors. When transmitting in 32-bit mode from a VSC7216-01 to a VSC7211 or VSC7214, use

TMODE(2:0)=000 or =1X0 (common transmit interface timing source) to minimize transmitter inter-channel

skew.

Parallel Interface Compatibility

In general, the VSC7216-01 low-speed parallel interfaces can be configured so that there are input and

output signals that are compatible with their VSC7211 and VSC7214 counterparts. On the transmit interface,

the signals Tn(7:0) and C/Dn behave identically on the VSC7216-01 as long as the input timing is referenced to

REFCLK (e.g., TMODE(2:0)=000). On the receive interface, the signals Rn(7:0), ERRn, KCHn and IDLEn

behave identically on the VSC7216-01 as long as the four receive channels present output data centered around

REFCLK (RMODE(1:0)=00) or timed to RCLKA/RCLKNA (RMODE(1:0)=10). When RMODE(1:0)=10, the

VSC7216-01 RCLKn/RCLKNn outputs provide four copies of RCLKA/RCLKNA, which are equivalent to the

VSC7211 and VSC7214 RCLK/RCLKN outputs.

The VSC7216-01 KCHAR input is no longer a synchronous input timed to REFCLK as on the VSC7211

and VSC7214. It is a static input used to define the control character encoding mode when C/Dn=1, as shown in

Table 3. The VSC7216-01 also has a separate WSENn input per channel instead of a common WSYNC input as

on the VSC7211 and VSC7214.

Operational Mode Compatibility

The VSC7211 and VSC7214 specifications define eight operating modes based on the binary combinations

of the RCLKEN, FLOCK and INDEP inputs. Note that these mode inputs control VSC7211 and VSC7214

receiver operation only, and have no effect on transmitter operation. For each of these modes, the equivalent

VSC7216-01 receiver configuration is presented.

VSC7214 MODE 0: RCLKEN=LOW, FLOCK=LOW, INDEP=LOW

Receiver Rn(7:0), ERRn, KCHn and IDLEn outputs are synchronous to REFCLK, IDLE insertion/deletion

is enabled, and the receive channels are word-aligned. The VSC7216-01 should be configured with

RMODE(1:0)=00, FLOCK=0, and WSI connected to its own WSO or to the WSO of another VSC7216-01 if

multiple devices are to be used in parallel. The WSI connection allows IDLE insertion/deletion to occur in

parallel across all word-aligned channels.

G52352-0, Rev 3.2

05/05/01

© VITESSE SEMICONDUCTOR CORPORATION • 741 Calle Plano • Camarillo, CA 93012

Tel: (800) VITESSE • FAX: (805) 987-5896 • Email: prodinfo@vitesse.com

Internet: www.vitesse.com

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