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WM8510GEDS/V データシートの表示(PDF) - Wolfson Microelectronics plc

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WM8510GEDS/V
Wolfson
Wolfson Microelectronics plc Wolfson
WM8510GEDS/V Datasheet PDF : 81 Pages
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WM8510
Production Data
Test Conditions
DCVDD=1.8V, DBVDD=AVDD=SPKVDD=3.3V, DGND=AGND=SPKGND=0V, TA=+25oC, Master Mode, fs=48kHz,
MCLK=256fs, 24-bit data, unless otherwise stated.
PARAMETER
Audio Data Input Timing Information
FRAME propagation delay from BCLK falling edge
ADCDAT propagation delay from BCLK falling edge
DACDAT setup time to BCLK rising edge
DACDAT hold time from BCLK rising edge
SYMBOL
tDL
tDDA
tDST
tDHT
MIN
10
10
TYP
MAX
10
10
UNIT
ns
ns
ns
ns
AUDIO INTERFACE TIMING – SLAVE MODE
Figure 3 Digital Audio Data Timing – Slave Mode
Test Conditions
DCVDD=1.8V, DBVDD=AVDD=SPKVDD=3.3V, DGND=AGND=SPKGND=0V, TA=+25oC, Slave Mode, fs=48kHz, MCLK=
256fs, 24-bit data, unless otherwise stated.
PARAMETER
Audio Data Input Timing Information
BCLK cycle time
BCLK pulse width high
BCLK pulse width low
FRAME set-up time to BCLK rising edge
FRAME hold time from BCLK rising edge
DACDAT hold time from BCLK rising edge
DACDAT set-up time to BCLK rising edge
ADCDAT propagation delay from BCLK falling edge
Note:
SYMBOL
tBCY
tBCH
tBCL
tLRSU
tLRH
tDH
tDS
tDD
BCLK period should always be greater than or equal to MCLK period.
MIN
TYP
MAX
UNIT
50
ns
20
ns
20
ns
10
ns
10
ns
10
ns
10
ns
20
ns
w
PD Rev 4.1 December 2006
10

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