CY7C1482V33-200BZXC(2004) データシートの表示（PDF） - Cypress Semiconductor

部品番号

コンポーネント説明

メーカー

CY7C1482V33-200BZXC
(Rev.:2004)

72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined Sync SRAM

Cypress Semiconductor 

PRELIMINARY

CY7C1480V33

CY7C1482V33

CY7C1486V33

Thermal Resistance[14]

Parameter

ΘJA

ΘJC

Description

Thermal Resistance

(Junction to Ambient)

Thermal Resistance

(Junction to Case)

Test Conditions

Test conditions follow standard

test methods and procedures

for measuring thermal

impedance, per EIA / JESD51.

TQFP

Package

24.63

2.28

209-BGA

Package

15.2

fBGA

Package

16.3

Unit

°C/W

1.7

2.1

°C/W

Capacitance[14]

Parameter

CADDRESS

CDATA

CCTRL

CCLK

CI/O

Description

Test Conditions

Address Input Capacitance TA = 25°C, f = 1 MHz,

Data Input Capacitance

VDD = 3.3V

Control Input Capacitance VDDQ = 2.5V

Clock Input Capacitance

Input/Output Capacitance

TQFP

Max.

6

5

8

6

5

209-BGA 165-fBGA

Max.

Max.

Unit

6

6

pF

5

5

pF

8

8

pF

6

6

pF

5

5

pF

AC Test Loads and Waveforms

3.3V I/O Test Load

OUTPUT

Z0 = 50Ω

3.3V

OUTPUT

RL = 50Ω

5 pF

VL = 1.5V

(a)

2.5V I/O Test Load

INCLUDING

JIG AND

SCOPE

R = 317Ω

R = 351Ω

(b)

VDDQ

GND

ALL INPUT PULSES

10%

90%

≤ 1ns

90%

10%

≤ 1ns

(c)

OUTPUT

Z0 = 50Ω

2.5V

OUTPUT

RL = 50Ω

5 pF

VL = 1.25V

(a)

INCLUDING

JIG AND

SCOPE

R = 1667Ω

R =1538Ω

VDDQ

GND

ALL INPUT PULSES

10%

90%

≤ 1ns

90%

10%

≤ 1ns

(b)

(c)

Note:

14. Tested initially and after any design or process change that may affect these parameters.

Document #: 38-05283 Rev. *C

Page 20 of 30

Share Link: