MB87L2250 データシートの表示（PDF） - Fujitsu

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MB87L2250

MPEG2 Transport, Video and Audio Decoder with integrated 32-Bit RISC CPU

Fujitsu 

Product Profile

MB87L2250 - MPEG2 Transport, Video and

Audio Decoder with integrated 32-Bit RISC CPU

October 1998

Edition 1.1

OVERVIEW

Fujitsu’s MB87L2250 is a single chip MPEG video and

audio decoder which also includes the transport demulti-

plexer and 32-Bit RISC CPU. This offers a very cost effec-

tive high integrated solution for set top box applications.

MPEG decoding and transport demultiplexing are imple-

mented in hardware. The on-chip CPU, operating at 54

MHz, is fully available for customer application software,

for example the EPG function.

The MB87L2250 uses a 2.5 frame architecture which re-

quires only one 16 Mbit SDRAM memory for MPEG de-

coding, OSD and section data buffering.

In addition the chip provides advanced features like letter-

box format conversion or teletext insertion into the VBI.

Plastic Flat Package

FPT-208P-M01

FEATURES

• RISC CPU integrated (32-bit)

• 1 KByte I-Cache

• 2.5 Frame Architecture

• Only 16 Mbit SDRAM required

• 32 PID’s supported

• Hardware Filter for PID and Sections

• IR Receiver

• DVB Descrambler

• Memory Save Mode to reduce Picture Memory

• Teletext Insertion in VBI

• Letterbox Format Conversion

• 3:2 Pull Down

• FR30 / 68k / SPARClite Processor Interface

• I2C Interface

• Two Smart Card Interfaces

• 2, 4, 6 or 8 Bit OSD

• 16 Programmable General Purpose I/O’s

• Automatic Clock Recovery

Pin Assignment

156

157

105

104

208

1

Index

53

52

Fujitsu Mikroelektronik GmbH Proprietary Information

1

Confidential

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