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MF1S5009 データシートの表示(PDF) - NXP Semiconductors.

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MF1S5009 Datasheet PDF : 32 Pages
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NXP Semiconductors
MF1S5009
Mainstream contactless smart card IC
All timing can be measured according to ISO/IEC 14443-3 frame specification as shown
for the Frame Delay Time in Figure 11. For more details refer to Ref. 3 and Ref. 4.
FDTPCD2PICC = Frame delay time PCD to PICC.
FDTPICC2PCD = Frame delay time PICC to PCD (must be at least 87 μS).
Last data bit transmitted by PCD
FDT = (n* 128 + 84)/fc
First modulation of PICC
128/fc
256/fc
logic ''1'' End of communication (E)
FDT = (n* 128 + 20)/fc
128/fc
Start of
communication (S)
128/fc
256/fc
logic ''0'' End of communication (E)
128/fc
Start of
communication (S)
TACK, TNAK
001aam208
(1) Measurement of the FDT (Frame Delay Time) from PCD to PICC
Fig 11. Frame Delay Time (from PCD to PICC), and TACK and TNAK
Remark: Due to the coding of commands, the measured timings usually exclude (a part
of) the end of communication. This needs to be considered, when comparing the given
times with the measured ones.
10.3 MIFARE ACK and NAK
The MIFARE Classic uses a 4 bit ACK / NAK as shown in Table 9.
Table 9. MIFARE ACK and NAK
Code (4-bit)
ACK/NAK
Ah
Acknowledge (ACK)
0h to 9h
NAK
Bh to Fh
NAK
MF1S5009
Product data sheet
PUBLIC
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 27 July 2010
189131
© NXP B.V. 2010. All rights reserved.
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