F64P30B8E2T085 データシートの表示（PDF） - Intel
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F64P30B8E2T085 Datasheet PDF : 102 Pages
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1-Gbit P30 Family
3.2
64-Ball Easy BGA Package
Figure 2. Easy BGA Mechanical Specifications
Ball A1
Corner
D
Ball A1
Corner
S1
12 3 4 5 6 7 8
A
B
C
D
E
E
F
G
H
Top View - Ball side down
8 7 6 5 4 3 21
A
B
C
D
E
F
G
H
Bottom View - Ball Side Up
S2
b
e
A1
A2
A
Seating
Plane
Y
Note: Drawing not to scale
Table 2.
Easy BGA Package Dimensions
Product Information
Package Height (64/128/256-Mbit)
Package Height (512-Mbit)
Ball Height (64/128/256-Mbit)
Ball Height (512-Mbit)
Package Body Thickness (64/128/256-Mbit)
Package Body Thickness (512-Mbit)
Ball (Lead) Width
Package Body Width
Package Body Length
Pitch
Ball (Lead) Count
Seating Plane Coplanarity
Corner to Ball A1 Distance Along D
Corner to Ball A1 Distance Along E
Symbol
A
A
A1
A1
A2
A2
b
D
E
[e]
N
Y
S1
S2
Millimeters
Min
-
-
0.250
0.240
-
-
0.330
9.900
12.900
-
-
-
1.400
2.900
Nom
-
-
-
-
0.780
0.910
0.430
10.000
13.000
1.000
64
-
1.500
3.000
Max
1.200
1.300
-
-
-
-
0.530
10.100
13.100
-
-
0.100
1.600
3.100
Min
-
-
0.0098
0.0094
-
-
0.0130
0.3898
0.5079
-
-
-
0.0551
0.1142
Inches
Nom
-
-
-
-
0.0307
0.0358
0.0169
0.3937
0.5118
0.0394
64
-
0.0591
0.1181
Max
0.0472
0.0512
-
-
-
-
0.0209
0.3976
0.5157
-
-
0.0039
0.0630
0.1220
Notes
1
1
1
1
Note: Daisy Chain Evaluation Unit information is at Intel® Flash Memory Packaging Technology http://developer.intel.com/
design/flash/packtech.
April 2005
12
Intel StrataFlash® Embedded Memory (P30)
Order Number: 306666, Revision: 001
Datasheet
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