AD7451_10 データシートの表示（PDF） - Analog Devices

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AD7451_10

Pseudo Differential Input, 1 MSPS, 10-/12-Bit ADCs in an 8-Lead SOT-23

Analog Devices 

When no amplifier is used to drive the analog input, it is

recommended that the source impedance be limited to low

values. The maximum source impedance depends on the

amount of total harmonic distortion that can be tolerated.

The THD increases as the source impedance increases and

performance degrades.

Figure 25 shows a graph of THD vs. analog input signal

frequency for different source impedances.

0

TA = 25°C

–10 VDD = 5V

–20

–30

–40

–50

–60

200Ω

–70

100Ω

–80

–90

–100

10k

62Ω

100k

10Ω

1M

INPUT FREQUENCY (Hz)

Figure 25. THD vs. Analog Input Frequency for Various Source Impedances

Figure 26 shows a graph of THD vs. analog input frequency for

various supply voltages while sampling at 1 MSPS with an SCLK

of 18 MHz. In this case, the source impedance is 10 Ω.

–50

TA = 25°C

–55

–60

–65

VDD = 2.7V

–70

VDD = 3.6V

–75

VDD = 4.75V

–80

–85

–90

10

VDD = 5.25V

100

1000

INPUT FREQUENCY (kHz)

Figure 26. THD vs. Analog Input Frequency for Various Supply Voltages

AD7441/AD7451

DIGITAL INPUTS

The digital inputs applied to the AD7441/AD7451 are not limited

by the maximum ratings that limit the analog inputs. Instead,

the digital inputs applied, that is, CS and SCLK, can go to 7 V

and are not restricted by the VDD + 0.3 V limits as on the analog

input. The main advantage of the inputs not being restricted to

the VDD + 0.3 V limit is that power supply sequencing issues are

avoided. If CS or SCLK are applied before VDD, there is no risk

of latch-up as there would be on the analog inputs if a signal

greater than 0.3 V were applied prior to VDD.

REFERENCE

An external source is required to supply the reference to the

AD7441/AD7451. This reference input can range from 100 mV

to VDD. The specified reference is 2.5 V for the power supply

range 2.7 V to 5.25 V. The reference input chosen for an appli-

cation must never be greater than the power supply. Errors in

the reference source result in gain errors in the AD7441/AD7451

transfer function and add to the specified full-scale errors of the

part. A capacitor of at least 0.1 μF must be placed on the VREF

pin. Suitable reference sources for the AD7441/AD7451 include

the AD780 and the ADR421. Figure 27 shows a typical connec-

tion diagram for the VREF pin.

VDD

0.1µF

10nF

AD780

NC

0.1µF

1

OPSEL 8 NC

2 VIN

7 NC

3 TEMP VOUT 6 2.5V

4 GND TRIM 5 NC

NC = NO CONNECT

VDD

AD7441/

AD7451*

VREF

0.1µF

*ADDITIONAL PINS OMITTED FOR CLARITY.

Figure 27. Typical VREF Connection Diagram for VDD = 5 V

Rev. D | Page 15 of 24

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