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TA3020 データシートの表示(PDF) - Unspecified

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TA3020 Datasheet PDF : 27 Pages
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Tripath Technology, Inc. - Technical Information
Application Information
Figure 1 is a simplified diagram of one channel (Channel 1) of a TA3020 amplifier to assist in understanding its
operation.
BBM0 22
BBM1 23
OAOUT1 26
CI
+
RI
RF
INV1 25
V5
-
ROFB
+
AGND
V5
ROFA
Offset Trim
Circuit
ROFB
COF
CA
BIASCAP 19
2.5V
V5
5V
MUTE 24
Processing
&
Modulation
VNN
VPP
V5
V5
*RVNN1
RREF
REF 32
VNNSENSE 30
*RVPP1
*RVNN2
VPPSENSE 29
OVER/
UNDER
VOLTAGE
DETECTION
*RVPP1
5V
CS
V5 27,35
AGND 28,34
OVER
CURRENT
DETECTION
43 OCS1HP
44 OCS1HN
RS
40 VBOOT1
45 HO1
RG
QO
46 HO1COM
VPP
CS
DB
VN10
RB
CHBR
CB
0.1uF
+
CBAUX
OVER
CURRENT
DETECTION
VN10
48 LO1
47 LO1COM
42 OCS1LP
41 OCS1LN
RG
QO
RS
33,37 OCR1
COCR
V5
ROCR
13 FBKOUT1
14 FBKGND1
RFBA
CFB
RFBB
OUTPUT
FILTER
CS
RFBA
RFBC
RFBB
RFBC
RL
VNN
15 HMUTE
VN10 1
VNN 39
VN10
CSW
VNN
VNN
F. BEAD
Analog Ground
Power Ground
Figure 1: Simplified TA3020 Amplifier
TA3020 Basic Amplifier Operation
The audio input signal is fed to the processor internal to the TA3020, where a switching pattern is generated.
The average idle (no input) switching frequency is approximately 700kHz. With an input signal, the pattern is
spread spectrum and varies between approximately 200kHz and 1.5MHz depending on input signal level and
frequency. Complementary copies of the switching pattern are level-shifted by the MOSFET drivers and output
from the TA3020 where they drive the gates (HO1 and LO1) of external power MOSFETs that are connected
as a half bridge. The output of the half bridge is a power-amplified version of the switching pattern that
switches between VPP and VNN. This signal is then low-pass filtered to obtain an amplified reproduction of the
audio input signal.
The processor portion of the TA3020 is operated from a 5-volt supply. In the generation of the switching
patterns for the output MOSFETs, the processor inserts a “break-before-make” dead time between the turn-off
of one transistor and the turn-on of the other in order to minimize shoot-through currents in the MOSFETs. The
dead time can be programmed by setting the break-before-make control bits, BBM1 and BBM0. Feedback
information from the output of the half-bridge is supplied to the processor via FBKOUT1. Additional feedback
information to account for ground bounce is supplied via FBKGND1.
The MOSFET drivers in the TA3020 are operated from voltages obtained from VN10 and LO1COM for the low-
side driver, and VBOOT1 and HO1COM for the high-side driver. VN10 must be a regulated 10V above VNN.
N-Channel MOSFETs are used for both the top and bottom of the half bridge. The gate resistors, RG, are used
to control MOSFET slew rate and thereby minimize voltage overshoots.
14
TA3020 – KL Rev. 3.0/09.03

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