SC14480A5M80VM データシートの表示（PDF） - Unspecified

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SC14480A5M80VM

1.8V Single Chip for DECT

Unspecified 

3.0 System Clock generation

3.1 CRYSTAL OSCILLATOR

The Digital Controlled Xtal Oscillator (DXCO) is a Col-

pitts oscillator designed for low power consumption and

high stability. The crystal oscillator frequency can be

10.368 MHz or 20.736 MHz.

Figure 2 shows the xtal connection diagram. Note that

all unnecessary load at the XTAL pins must be

avoided. This means that the BXTAL pin must be

used for frequency measurement/adjustment.

Table 4: Typical component values

Cpar

1pF

2pF

3pF

XTAL, CL

10pF

10pF

10pF

10pF

12pF

Cs1

short

220pF

100pF

100pF

short

Cs2

short

220pF

short

100pF

short

10pF

56pF

short

Cload (crystal load capacitance)

5pF

Parasitic capacitance is to high to guaran-

tee reliable start-up.

XTAL1

Cs1

3.2 PCB CONSIDERATIONS

C1

(optional)

oscillator

BXTAL

It is very important to minimize the parasitic capaci-

tance between XTAL1 and XTAL2. This parasitic

R1

C0

Cpar

capacitance is caused by the following components:

L1

tial Crystal

(optional)

Cs2

XTAL2

PCB + components

Cv

SC14480

Figure 2 Xtal Equivalent circuit

n For best start-up behavior and stable oscillation, it is

e important to keep Cpar and Co as small as possible.

Capacitors Cs1 and Cs2 can be added in series with

fid the crystal terminals to centre the trim-range (one

capacitor alone can centre the trim-range, but two is

better for symmetry). The capacitance seen by the

n crystal is given by the following equation:

o Cload = --------1-------------+------------1-------------1-+---------------------------1-------------------------

(1)

C Cs1 Cs2 Cpar + Cv

• Solder pads of the SC14480.

Differential capacitance between XTAL1 and XTAL2

pins of about 0.15pF

• Wires from crystal to SC14480.

The capacitance of wires separated by more than 3

times the width is dominated by the capacitance to

the layer below. A typical value for this capacitance

to the layer below is in the order of 0.11pF/mm

(assuming trace width = 0.2mm, Er = 4.5, distance to

layer below = 0.138mm). The differential capaci-

tance is composed of the two capacitors to the layer

below in series. So the differential capacitance

between two wires is half the capacitance to the

layer below of a single wire. Example: the differen-

tial capacitance of 10mm long wires will be in the

order of 0.55pF. Therefore place the crystal close

to the device.

• Footprint of the crystal.

For a surface mount crystal, the solder pads can

become quite big. When the layer below is used as

ground plane or for wires, this can easily result in a

differential capacitance of more than 1pF. Avoid

using the area below the footprint of the crystal.

Table 3: Typical Xtal specification

Parameter

CL

C0

Cpar

Cs1,2

Description

Value

Load capacitance

10 pF /

12pF

Shunt capacitance

1-2 pF

Parasitic PCB capacitance < few pF

between XTAL1 and XTAL2

Optional series capacitor to 56pF ...

centre the trim-range

220pF

3.3 FREQUENCY CONTROL

Register CLK_FREQ_TRIM_REG (0xFF400A) controls

the trimming of the crystal oscillator. The frequency is

trimmed by two on-chip variable capacitor banks. Both

capacitor banks are controlled through the same regis-

ter.

Each of the two variable capacitor banks vary from

minimum to max in 2048 equal steps. With

CLK_FREQ_TRIM_REG = 00 minimum capacitance

and thus maximum frequency is selected. With

CLK_FREQ_TRIM_REG = 0x7FF maximum capaci-

tance and thus minimum frequency is selected.

The eight least significant bits of

CLK_FREQ_TRIM_REG directly control five binary

© 2008-2009 SiTel Semiconductor

16

Version: January 21, 2009 v1.0

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