28F002BC データシートの表示（PDF） - Intel
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28F002BC Datasheet PDF : 37 Pages
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28F002BC 2-MBIT BOOT BLOCK FLASH MEMORY
Table 9. AC Characteristics: WE#—Controlled Write Operations(1) (Continued)
28F002BC-80 28F002BC-120
Symbol
Parameter
Notes VCC = 5V ± 10% VCC = 5V ± 10% Units
100 pF
100 pF
Min
Max
Min
Max
tWHWL
WE# Pulse Width High
20
20
ns
tWHQV1 Duration of Programming Operation 2, 5
6
6
µs
tWHQV2 Duration of Erase Operation (Boot) 2, 5, 6 0.3
0.3
s
tWHQV3 Duration of Erase Operation
2,5
0.3
0.3
s
(Parameter)
tWHQV4 Duration of Erase Operation (Main)
2, 5
0.6
0.6
s
tQVVL
tQVPH
VPP Hold from Valid SRD
RP# VHH Hold from Valid SRD
5, 8
0
6, 8
0
0
ns
0
ns
tPHBR
Boot Block Lock Delay
7, 8
100
100
ns
NOTES:
1. Read timing characteristics during write and erase operations are the same as during read-only operations. Refer to AC
characteristics during read mode.
2. The on-chip WSM completely automates program/erase operations; program/erase algorithms are now controlled internally
which includes verify and margining operations.
3. Refer to command definition table for valid AIN.
4. Refer to command definition table for valid DIN.
5. Program/erase durations are measured to valid SRD data (successful operation, SR.7 = 1).
6. For boot block program/erase, RP# should be held at VHH until operation completes successfully.
7. Time tPHBR is required for successful relocking of the boot block.
8. Sampled, but not 100% tested.
PRELIMINARY
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