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AP3842C データシートの表示(PDF) - BCD Semiconductor

部品番号
コンポーネント説明
メーカー
AP3842C
BCDSEMI
BCD Semiconductor BCDSEMI
AP3842C Datasheet PDF : 13 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
CURRENT MODE PWM CONTROLLER
Pin Configuration
P/M Package
(DIP-8/SOIC-8)
COMP
VFB
ISENSE
RT/CT
1
8
2
7
3
6
4
5
VREF
VCC
OUTPUT
GND
Figure 2. Pin Configuration of AP3842C/3C/4C/5C (Top View)
Data Sheet
AP384XC
Pin Description
Pin Number
1
2
3
4
5
6
7
8
Pin Name
COMP
VFB
ISENSE
RT/CT
GND
OUTPUT
VCC
VREF
Function
This pin is the Error Amplifier output and is made available for loop compensation.
The inverting input of the Error Amplifier. It is normally connected to the switching
power supply output through a resistor divider.
A voltage proportional to inductor current is connected to this input. The PWM uses
this information to terminate the output switch conduction.
The Oscillator frequency and maximum output duty cycle are programmed by con-
necting resistor RT to VREF and capacitor CT to ground. Operation to 500 kHz is possi-
ble.
The combined control circuitry and power ground.
This output directly drives the gate of a power MOSFET. Peak currents up to 1.0 A are
sourced and sunk by this pin.
The positive supply of the control IC.
This is the reference output. It provides charging current for capacitor CT through
resistor RT.
Sep. 2006 Rev. 1. 1
BCD Semiconductor Manufacturing Limited
2

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