3974
DMOS DUAL FULL-BRIDGE
PWM MOTOR DRIVER
ELECTRICAL CHARACTERISTICS at TA = +25°C, VBB = 50 V, VDD = 5.0 V, fPWM < 50 kHz (unless
otherwise noted), continued.
Characteristic
Control Logic (continued)
Reference Input Current
Reference Input Offset Voltage
Reference Divider Ratio
Symbol
IREF
VIO
VREF/VS
Gain (Gm) Error (note 3)
EG
Propagation Delay Time
tpd
Crossover Delay Time
tCOD
Thermal Shutdown Temperature TJ
Thermal Shutdown Hysteresis
∆TJ
UVLO Enable Threshold
VUVLO
UVLO Hysteresis
∆VUVLO
Logic Supply Current
IDD
Test Conditions
VREF = 2.6 V
D16 = 1
D16 = 0
VREF = 2.6 V, D16 = 0
VREF = 0.5 V, D16 = 0
VREF = 2.6 V, D16 = 1
VREF = 0.5 V, D16 = 1
50% TO 90%:
PWM change to source on
PWM change to source off
PWM change to sink on
PWM change to sink off
SR enabled
Increasing VDD
fPWM < 50 kHz
Outputs off
Idle mode (D18 = 1, D19 = 0)
Sleep mode (inputs below 0.5 V)
Limits
Min. Typ. Max.
Units
—
— ±1.0
µA
— ±10 —
mV
— 10 —
—
— 5.0 —
—
—
0 ±4.0
%
—
0 ±14
%
—
0 ±4.0
%
—
0 ±10
%
600 750 1000
ns
50 150 350
ns
600 750 1000
ns
50 150 350
ns
300 600 1000
ns
— 165 —
°C
— 15 —
°C
3.9 4.2 4.45
V
0.05 0.10 —
V
—
—
10
mA
—
—
8.0
mA
—
—
1.5
mA
—
— 100
µA
NOTES: 1. Typical Data is for design information only.
2. Negative current is defined as coming out of (sourcing) the specified device terminal.
3. EG = [(VREF/Range) - VS]/(VREF/Range).
4
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