DSP56F802TA80E(2005) データシートの表示（PDF） - Freescale Semiconductor

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DSP56F802TA80E
(Rev.:2005)

16-bit Digital Signal Controllers

Freescale Semiconductor 

Flash Memory Characteristics

Figure 3-3 shows the definitions of the following signal states:

• Active state, when a bus or signal is driven, and enters a low impedance state

• Tri-stated, when a bus or signal is placed in a high impedance state

• Data Valid state, when a signal level has reached VOL or VOH

• Data Invalid state, when a signal level is in transition between VOL and VOH

Data1 Valid

Data1

Data2 Valid

Data2

Data Invalid State

Data Active

Data

Tri-stated

Figure 3-3 Signal States

3.4 Flash Memory Characteristics

Data3 Valid

Data3

Data Active

Table 3-5 Flash Memory Truth Table

Mode

XE1 YE2 SE3 OE4

Standby

L

L

L

L

Read

H

H

H

H

Word Program

H

H

L

L

Page Erase

H

L

L

L

Mass Erase

H

L

L

L

1. X address enable, all rows are disabled when XE = 0

2. Y address enable, YMUX is disabled when YE = 0

3. Sense amplifier enable

4. Output enable, tri-state Flash data out bus when OE = 0

5. Defines program cycle

6. Defines erase cycle

7. Defines mass erase cycle, erase whole block

8. Defines non-volatile store cycle

PROG5

L

L

H

L

L

ERASE6

L

L

L

H

H

MAS17

L

L

L

L

H

NVSTR8

L

L

H

H

H

56F802 Technical Data, Rev. 7

Freescale Semiconductor

19

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