78Q2123/F データシートの表示（PDF） - Teridian Semiconductor Corporation

部品番号

コンポーネント説明

メーカー

78Q2123/F

MicroPHY™ 10/100BASE-TX Transceiver

Teridian Semiconductor Corporation 

78Q2123/78Q2133 MicroPHY™

10/100BASE-TX Transceiver

MR1: Status Register

Bits 1.15 through 1.11 reflect the ability of the 78Q2123/78Q2133. They do not reflect any ability changes made

via the MII Management interface to bits 0.13 (SPEEDSL) , 0.12 (ANEGEN) and 0.8 (DUPLEX) in the Control

Register.

BIT SYMBOL TYPE DEFAULT DESCRIPTION

1.15 100T4

R

0

100BASE-T4 Ability: Reads ‘0’ to indicate the 78Q2123/78Q2133 do

not support 100Base-T4 mode.

1.14 100X_F

R

1

100BASE-TX Full Duplex Ability:

0 : Not able

1 : Able

1.13 100X_H R

1

100BASE-TX Half Duplex Ability:

0 : Not able

1 : Able

1.12 10T_F

R

1

10BASE-T Full Duplex Ability:

0 : Not able

1 : Able

1.11 10T_H

R

1

10BASE-T Half Duplex Ability:

0 : Not able

1 : Able

1.10 100T2_F R

0

100BASE-T2 Full Duplex Ability: Reads ‘0’ to indicate the

78Q2123/78Q2133 do not support 100Base-T2 full duplex mode.

1.9 100T2_H R

0

100BASE-T2 Half Duplex Ability: Reads ‘0’ to indicate the

78Q2123/78Q2133 do not support 100Base-T2 full duplex mode.

1.8

EXTS

R

0

Extended Status Information Availability: Reads ‘0’ to indicate the

78Q2123/78Q2133 do not support Extended Status information on

MR15.

1.7

RSVD

R

0

Reserved

1.6

MFPS

R

0

Management Frame Preamble Suppression Support: A “0” indicates

that the 78Q2123/78Q2133 can read management frames with a

preamble.

1.5 ANEGC

R

0

Auto-Negotiation Complete: A logic one indicates that the Auto-

Negotiation process has been completed, and that the contents of

registers MR4,5,6 are valid.

Page: 13 of 42

© 2009 Teridian Semiconductor Corporation

Rev 1.5

Share Link: