82541EI データシートの表示（PDF） - Intel
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82541EI Datasheet PDF : 46 Pages
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Networking Silicon — 82541(PI/GI/EI)
Figure 10. TVAL Test Load (PCI 5 V Signaling Environment)
Pin
Test
1/2 inch max.
Point
50 pF
NOTE: 50 pF load used for maximum times. Minimum times are specified with 0 pF load.
Table 20. Link Interface Rise and Fall Times
Symbol
Parameter
TR
Clock rise time
TF
Clock fall time
TR
Data rise time
TF
Data fall time
Condition
0.8 V to 2.0 V
2.0 V to 0.8 V
0.8 V to 2.0 V
2.0 V to 0.8 V
Min
Max
Unit
0.7
ns
0.7
ns
0.7
ns
0.7
ns
Figure 11. Link Interface Rise/Fall Timing
2.0 V
0.8 V
TR
TF
31
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