A29040BV-55 データシートの表示（PDF） - AMIC Technology

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A29040BV-55

512K X 8 Bit CMOS 5.0 Volt-only, Uniform Sector Flash Memory

AMIC Technology 

After the sector erase command sequence is written, the

system should read the status on I/O7 (Data Polling) or I/O6

(Toggle Bit 1) to ensure the device has accepted the

command sequence, and then read I/O3. If I/O3 is "1", the

internally controlled erase cycle has begun; all further

commands (other than Erase Suspend) are ignored until the

erase operation is complete. If I/O3 is "0", the device will

accept additional sector erase commands. To ensure the

command has been accepted, the system software should

check the status of I/O3 prior to and following each

subsequent sector erase command. If I/O3 is high on the

second status check, the last command might not have been

accepted. Table 5 shows the outputs for I/O3.

A29040B Series

START

Read I/O7-I/O0

Read I/O7-I/O0 (Note 1)

Toggle Bit

No

= Toggle ?

Yes

No

I/O5 = 1?

Yes

Read I/O7 - I/O0

Twice

(Notes 1,2)

Toggle Bit

No

= Toggle ?

Yes

Program/Erase

Operation Not

Commplete, Write

Reset Command

Program/Erase

Operation

Commplete

Notes :

1. Read toggle bit twice to determine whether or not it is

toggling. See text.

2. Recheck toggle bit because it may stop toggling as I/O5

changes to "1". See text.

Figure 4. Toggle Bit Algorithm

PRELIMINARY (December, 2004, Version 0.2)

13

AMIC Technology, Corp.

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