A3968SLBTR(2008) データシートの表示（PDF） - Allegro MicroSystems
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A3968SLBTR Datasheet PDF : 8 Pages
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A3968
Dual Full-Bridge PWM Motor Driver
Features and Benefits
▪ ±650 mA continuous output current
▪ 30 V output voltage rating
▪ Internal fixed-frequency PWM current control
▪ Satlington® sink drivers
▪ Brake mode
▪ User-selectable blanking window
▪ Internal ground-clamp and flyback diodes
▪ Internal thermal-shutdown circuitry
▪ Crossover-current protection and UVLO protection
Package: 16 pin SOIC (suffix LB)
Description
TheA3968 bidirectionally controls two DC motors. The device
includes two full-bridges capable of continuous output currents
of ±650 mA and operating voltages to 30 V. Motor winding
current can be controlled by the internal fixed-frequency,
pulse-width modulated (PWM), current-control circuitry. The
peak load current limit is set by user selection of a reference
voltage and current-sensing resistors.
The fixed-frequency pulse duration is set by a user-selected
external RC timing network. The capacitor in the RC timing
network also determines a user-selectable blanking window that
prevents false triggering of the PWM current-control circuitry
during switching transitions.
To reduce on-chip power dissipation, the full-bridge power
outputs have been optimized for low saturation voltages. The
sink drivers feature the Allegro® patented Satlington® output
structure. The Satlington outputs combine the low voltage drop
of a saturated transistor and the high peak current capability
of a Darlington.
For each bridge, the INPUTA and INPUTB terminals determine
the load-current polarity by enabling the appropriate source and
sink driver pair. When a logic low is applied to both INPUTs
Not to scale
29319.29G
Continued on the next page…
Typical Application
MOTOR 1
+5 V
1
INPUT1A
2
INPUT1B
3
4
0.5 Ω
5
V BB
LOGIC LOGIC
16
15
INPUT2A
14
INPUT2B
13
0.5 Ω
12
+24 V
47 μF
6
V BB
7
8 VREF
11
VCC 10
RC 9
+5 V
MOTOR 2
Dwg. EP-047-6
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