A43L8316
Preliminary
128K X 16 Bit X 2 Banks Synchronous DRAM
Document Title
128K X 16 Bit X 2 Banks Synchronous DRAM
Revision History
Rev. No.
0.0
1.0
History
Initial issue
Error correction: basic feature and function descriptions
-CAS interrupt (I)
Change tSHZ in Hi-Z at 7ns part: 7.5ns → 7ns (max.)
Change tSHZ in Hi-Z at 8ns part: 7ns → 7.5ns (max.)
Add 7ns and 8ns parts
Issue Date
February 15, 2000
April 7, 2000
Remark
Preliminary
Preliminary (April, 2000, Version 1.0)
AMIC Technology, Inc.