A49FL004 データシートの表示（PDF） - AMIC Technology

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A49FL004

4 Mbit CMOS 3.3Volt-only Firmware Hub/LPC Flash Memory

AMIC Technology 

A49FL004

Table 14: Software Data Protection Command Definition

Command

Bus

1st Cycle (1)

Cycles Addr(2) Data

2nd Cycle

Addr Data

3rd Cycle

Addr Data

4th Cycle

Addr Data

5th Cycle

Addr Data

6th Cycle

Addr Data

Block Erase

Read

Sector Erase

Chip Erase (1)

Byte Program

Product ID Entry

Product ID Exit (5)

Product ID Exit (5)

6 5555H AAH 2AAAH 55H 5555H 80H 5555H AAH 2AAAH 55H BA (4) 50H

1

Addr DOUT

6 5555H AAH 2AAAH 55H 5555H 80H 5555H AAH 2AAAH 55H SA (3) 30H

6 5555H AAH 2AAAH 55H 5555H 80H 5555H AAH 2AAAH 55H 5555H 10H

4 5555H AAH 2AAAH 55H 5555H A0H Addr DIN

3 5555H AAH 2AAAH 55H 5555H 90H

1 XXXXH F0H

3 5555H AAH 2AAAH 55H 5555H F0H

Notes:

1. Chip erase is available in A/A Mux Mode only.

2. Address A[15:0] is used for SDP command decoding internally and A15 must be “0” in FWH/LPC and A/A Mux modes.

AMS - A16 = Don’t care where AMS is the most-significant address of A49FL004.

3. SA = Sector address to be erased.

4. BA = Block address to be erased.

5. Either one of the Product ID Exit command can be used.

PRELIMINARY (September, 2005, Version 0.0)

19

AMIC Technology, Corp.

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