A8510GECTR-T データシートの表示（PDF） - Allegro MicroSystems

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A8510GECTR-T

Wide Input Voltage Range, High Efficiency Fault Tolerant LED Driver

Allegro MicroSystems 

A8510

Wide Input Voltage Range, High Efficiency

Fault Tolerant LED Driver

Functional Description

The A8510 incorporates a current-mode boost controller with

internal DMOS switch, and eight LED current sinks. It can be

used to drive eight LED strings of up to 12 white LEDs in series,

with current up to 40 mA per string. For optimal efficiency,

the output of the boost stage is adaptively adjusted to the mini-

mum voltage required to power all of the LED strings. This is

expressed by the following equation:

VOUT = max ( VLED1 ,..., VLED8 ) + VREG

(1)

where

VLEDx is the voltage drop across LED strings 1 through 8, and

VREG is the regulation voltage of the LED current sinks (typi-

cally 0.68 V at the maximum LED current).

Enabling the IC

The IC turns on when a logic high signal is applied on the

EN/PWM pin with a minimum duration of tPWMH for the first

clock cycle, and the input voltage present on the VIN pin is

greater than the 4.35 V necessary to clear the UVLO (VUVLOrise )

threshold. The power-up sequence is shown in figure 2. Before

the LEDs are enabled, the A8510 driver goes through a system

check to determine if there are any possible fault conditions that

might prevent the system from functioning correctly. Also, if the

FSET/SYNC pin is pulled low, the IC will not power-up. More

information on the FSET/SYNC pin can be found below, in the

Synchronization section of this document.

Powering up: LED pin short-to-GND check

The VIN pin has a UVLO function that prevents the A8510 from

powering-up until the UVLO threshold is reached. After the VIN

pin goes above UVLO, and a high signal is present on the EN/

PWM pin, the IC proceeds to power-up. As shown in figure 3, at

this point the A8510 enables the disconnect switch and checks if

any LED pins are shorted to GND and/or are not used. The LED

detect phase starts when the VGATE voltage of the disconnect

switch is equal to VIN – 4.5 V.

After the voltage threshold on the LEDx pins exceeds 120 mV, a

timer of 3000 to 4000 clock cycles is used to determine the status

of the pins. Thus, the LED detection duration varies with the

switching frequency, as shown in the following table:

Switching Frequency

(kHz)

2000

1000

800

600

Detection Time

(ms)

1.5 to 2

3 to 4

3.75 to 5

5 to 6.7

The LED pin detection voltage thresholds are as follows:

LED Pin Voltage LED Pin Status

<70 mV

Short-to-GND

150 mV

Not used

>325 mV

LED pin in use

Action

Power-up is halted

LED removed from operation

None

VDD

VGATE

VGATE = VIN – 4.5 V

C1

FSET/SYNC

C2

ISET

C3

EN/PWM

C4

C1

LEDx

C2

ISET

C3

C4

EN/PWM

LED detection period

t

Figure 2. Power-up diagram at fSW = 2 MHz; shows VDD (ch1, 2 V/div.),

FSET/SYNC (ch2, 1 V/div.), ISET (ch3, 1 V/div.), and EN/PWM (ch4, 2 V/

div.) pins, t = 200 μs/div.

t

Figure 3. Power-up diagram; shows the relationship of an LEDx pin with

respect to the gate voltage of the disconnect switch (if used) during the

LED detect phase, as well as the duration of the LED detect phase for a

switching frequency of 800 kHz; shows VGATE (ch1, 5 V/div.), LEDx (ch2,

500 mV/div.), ISET (ch3, 1 V/div.), and EN/PWM (ch4, 5 V/div.) pins,

t = 1 ms/div.

Allegro MicroSystems, Inc.

10

115 Northeast Cutoff

Worcester, Massachusetts 01615-0036 U.S.A.

1.508.853.5000; www.allegromicro.com

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