AD5100YRQZ データシートの表示（PDF） - Analog Devices

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AD5100YRQZ

System-Management IC with Programmable Quad Voltage Monitoring and Supervisory Functions

Analog Devices 

Preliminary Technical Data

AD5100

MR

0–5V

√

Monitoring Inputs

V1MON

V1MON is a high-voltage monitoring input that controls the

SHDN and RESET functions of the external devices. In

addition, it also provides a shutdown warning to the system.

V1MON monitors inputs from 6V to 30V. It has a 16-level

programmable over-voltage, under-voltage (OV,UV)

shutdown threshold with an 8-step 0.05ms-200ms shutdown

hold time and 0.05ms-1200ms shutdown delay. The

shutdown hold time means that the shutdown of the external

device is held until the programmed-time is reached. On the

other hand, the shutdown delay means that shuting down the

external device is delayed until the programmed-time is

reached.

The OV threshold chosen must be greater than the UV

threshold. When the shutdown is triggered either because the

input has reached OV or UV threshold, such fault condition

will be temporarily recorded in the Fault Detection Register.

The SHDNWARN output will transition low for signaling

before shutdown occurs. The occurance of Shutdown is

V1MON

tGLITCH

Highest Prority on

Other Inputs

Leave Floating

depending on how long the shutdown programmed-delay is

set relative to the SHDNWARN propagation delay, this

feature attempts to allow the system to finish any critical

house keeping tasks before shuting down the external device.

The V1MON, shutdown, and shutdown warning timing

diagrams are shown in Figure 5. The ranges of OV and UV

Thresholds are shown in Table 5a and the programming

codes of the selected-thresholds are found in Table 5b. The

defaulted OV threshold is 18.00V and UV threshold is 8.43V.

Simarily, the ranges of shutdown hold and delay times are

shown in Table 6a and the programming codes of the

selected-timings are found in Table 6b. The defaulted

shutdown hold time is 200ms delay time is 1200ms.

The voltage at V1MON provides the power for the AD5100 but

valid signal at V2MON must be present before the internal VREG

starts operation. Details will be explained in the power

section.

V1MON_OV *

V1MON_UV *

V2MON

SHDN

tGLITCH

t2SD_HOLD * t1SD_DELAY *

t1SD_HOLD * t1SD_DELAY * t1SD_HOLD *

tMIN#

t2SD_DELAY *

t2SD_HOLD *

tFD_DELAY

tFD_DELAY

tFD_DELAY

V2MON_ON *

V2MON_OFF *

t2SD_DELAY *

tFD_DELAY

SHDNWARN

* = Programmable

#: The duration of the tMIN must be shorter than tVREG_Off_Delay or else the AD5100 will be powered off

Figure 5. V1MON and V2MON Shutdown Timing Diagrams (Note RESET follows SHDN ).

The V1MON pin is monitored by two comparators, one for

indicating an OV condition has occurred. Due to hysteresis,

over-voltage, and one for under-voltage detection. Both are

the V1MON input must be brought below the programmed OV

designed with 1.5% hysteresis.

threshold by 1.5% before the comparator will be in-active,

When the V1MON n input goes above the programmed OV

indicating the OV condition has gone away, see Figure 6.

threshold, the comparator will become active immediately,

Rev. PrJ | Page 11 of 32

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