AD7457(Rev0) データシートの表示（PDF） - Analog Devices

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AD7457
(Rev.:Rev0)

Low Power, Pseudo Differential, 100 kSPS 12-Bit ADC in an 8-Lead SOT-23

Analog Devices 

AD7457

APPLICATION HINTS

GROUNDING AND LAYOUT

The printed circuit board that houses the AD7457 should be

designed so that the analog and digital sections are separated

and confined to certain areas of the board. This facilitates the

use of ground planes that can be easily separated. A minimum

etch technique is generally best for ground planes, because it

gives the best shielding. Digital and analog ground planes

should be joined in only one place, and the connection should

be a star ground point established as close as possible to the

GND pin on the AD7457.

Avoid running digital lines under the device, because this

couples noise onto the die. The analog ground plane should be

allowed to run under the AD7457 to avoid noise coupling. The

power supply lines to the AD7457 should use as large a trace as

possible to provide low impedance paths and reduce the effects

of glitches on the power supply line. Fast switching signals such

as clocks should be shielded with digital ground to avoid

radiating noise to other sections of the board, and clock signals

should never run near the analog inputs. Avoid crossover of

digital and analog signals. Traces on opposite sides of the board

should run at right angles to each other. This reduces the effects

of feed through the board. A micro strip technique is by far the

best, but is not always possible with a double-sided board.

In this technique, the component side of the board is dedicated

to ground planes, while signals are placed on the solder side.

Good decoupling is also important. All analog supplies should

be decoupled with 10 µF tantalum capacitors in parallel with

0.1 µF capacitors to GND. To achieve the best from these

decoupling components, place them as close as possible to the

device.

Rev. 0 | Page 16 of 20

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